1. Field of the Invention
The present invention relates to an integraded edge structure for high voltage semiconductor devices and a related manufacturing process.
2. Discussion of Related Art
High voltage semiconductor devices include PN junctions which must withstand high reverse voltages, e.g., the base-collector junction of a bipolar NPN transistor. Most PN junctions, fabricated by planar technology, essentially consist of a first semiconductor region of a given conductivity type diffused into a second semiconductor region of opposite conductivity type. An insulating oxide layer is superimposed over the two regions, and metal contacts are provided for electrical connection of the two semiconductor regions
A depletion region is associated with the PN junction, which can be considered as made up of two regions, a first one along the plane portion of the junction, a second one at the edges of the plane portion. The electric field has a different behavior in each of the two regions. In the plane portion, the equipotential lines are parallel to the junction; the maximum electric field is located at the junction; and breakdown occurs when the electric field critical value "Ecrit." At the junction edges, because of the finite junction depth, the equipotential lines are curved and closer than in the plane portion. Consequently, the electric field increases, because higher electric fields are associated with smaller curvature radii, i.e., shallower junctions.
The breakdown voltage of a PN diffused junction is usually lower than that of the corresponding plane junction, because the electric field in the edge region is much higher. Thus, the ratio of the breakdown voltage of the edge and the plane portion is below unity.
Several techniques have been developed to increase this ratio, essentially by changing the size of the depletion layer to avoid local increases in the electric field that can lead to early breakdown. In one of these techniques, the metal contact of the diffused region of the junction is extended over the insulating oxide layer. In this way, a metal field-plate is formed which, acting as a shield, causes the equipotential lines to extend over a wider region, thus reducing the electric field. The high density of the equipotential lines in the oxide layer does not represent a problem, because of the higher dielectric strength of the oxide layer with respect to the silicon. At the metal field-plate edge, however, the shielding action ceases, with an increase of the electric field in the surface region.
To reduce the surface electric field, the metal field-plate can be extended over a thicker region of the oxide layer. However, surface states, fixed interface charges, and mobile charges can lead to surface breakdown.
In another technique, described in GB-A-2163597, one or more high resistivity rings are provided around the lateral edges of the junction. In this way the depletion layer spreads over wider regions, so that the spatial charge distribution is widened and the electric field is consequently reduced. The rings are formed by implantation and diffusion of dopants. By controlling the implanted dose and the diffusion process, it is possible to achieve the desired resistivity. Two or more concentrical rings, with increasing resistivity from the inner to the outer one, are necessary when the device must withstand high reverse voltages. However, peaks in the electric field value are observed at the interface between the two rings and at the edge of the outer ring. An increase in the number of rings leads to larger spreading of the depletion layer, and the peaks in the electric field value are lowered.
The effectiveness of the high resistivity rings could be improved by increasing their depth. This reduces the electric field, especially pear the surface of the semiconductor device, where the existence of surface charges causes local variations of the electric field value.
To obtain a deep junction by implantation and diffusion, it is necessary to use dopants having high diffusivity, and the diffusion process must be extended in time and/or performed at higher temperatures. Both of these solutions are disadvantageous for an industrial application.
In view of the state of art described, an object of the present invention is to provide an integrated edge structure, for high voltage semiconductor devices, which has deep, high resistivity rings, but requires neither the use of high-diffusivity dopant species nor long, high-temperature diffusion processes.